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JEE Main 202623 JanuaryEvening Shift

Exam: JEE Main
Year: 2026
Date: 23 January
Shift: Evening Shift
Subject: Physics
Chapter: Semiconductors

JEE Main 2026 · 23 January · Evening Shift · Physics · Semiconductors

For the given logic gate circuit, which of the following is the...

For the given logic gate circuit, which of the following is the correct truth table?

For the given logic gate circuit, which of the following is the correct truth table?

Options

A( $\begin{array}{c|c|c} n & m & z \\ \hline 0 & 0 & 0 \\ 0 & 1 & 1 \\ 1 & 1 & 0 \\ 1 & 0 & 1 \end{array}$
B( $\begin{array}{c|c|c} n & m & z \\ \hline 0 & 0 & 1 \\ 0 & 1 & 0 \\ 1 & 1 & 1 \\ 1 & 0 & 0 \end{array}$
C( $\begin{array}{c|c|c} n & m & z \\ \hline 0 & 0 & 1 \\ 0 & 1 & 0 \\ 1 & 1 & 0 \\ 1 & 0 & 0 \end{array}$
D( $\begin{array}{c|c|c} n & m & z \\ \hline 0 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 1 & 0 \\ 1 & 0 & 0 \end{array}$

Correct answer

D. ( $\begin{array}{c|c|c} n & m & z \\ \hline 0 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 1 & 0 \\ 1 & 0 & 0 \end{array}$

Step-by-step solution

The given logic circuit consists of an OR gate and a NAND gate.
The output of the OR gate is

y = n + m

.
The inputs to the NAND gate are

n

and

y

.
The final output

z

is given by

z = \overline{n \cdot y} = \overline{n \cdot (n + m)}

.
Using Boolean algebra:

n \cdot (n + m) = n \cdot n + n \cdot m = n + n \cdot m = n(1 + m) = n

.
Therefore,

z = \overline{n}

.
Let's verify this with the truth table:

n	m	y = n + m	z = NAND(n, y)
0	0	0	1
0	1	1	1
1	1	1	0
1	0	1	0

Comparing this with the given options, option (4) matches the calculated truth table.

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