The given circuit works as :

Let the inputs be A and B. The circuit is composed of NOR gates.
A NOR gate with its inputs tied together acts as a NOT gate.
The output of the first NOR gate (input A) is $Y_1 = \overline{A+A} = \bar{A}$.
The output of the second NOR gate (input B) is $Y_2 = \overline{B+B} = \bar{B}$.
These outputs are fed into a third NOR gate. Its output is $Y_3 = \overline{Y_1 + Y_2} = \overline{\bar{A} + \bar{B}}$.
Using De Morgan's theorem, $Y_3 = (\overline{\bar{A}}) \cdot (\overline{\bar{B}}) = A \cdot B$.
This output $Y_3$ is the input to the fourth NOR gate, which is configured as a NOT gate.
The final output is $Y_{out} = \overline{Y_3} = \overline{A \cdot B}$.
The expression $\overline{A \cdot B}$ represents a NAND gate.