Manipal MET2017PhysicsSemiconductors
The inputs and outputs for different time intervals are given below the NAND gate ( array |l|l|l|l| Time & Inputs A & Inputs B & Outputs Y t₁ to t₂ & 0 & 1 & P t₂ to t₃ & 0 & 0 & Q t₃ to t₄ & 1 & 0 & R t₄ to t₅ & 1 & 1 & ~S array ) The values taken by (P, Q, R, S ) are respectively
Options
- A(1,1,1,0 )
- B(0,1,0,1 )
- C(0,1,0,0 )
- D(1,0,1,1 )
Correct answer
A. (1,1,1,0 )
Step-by-step solution
NAND gate is obtained when the output of AND gate is made as the input of NOT gate Boolean expression for NAND gate is array ccc A & B & Y 0 & 0 & 1 1 & 0 & 1 0 & 1 & 1 1 & 1 & 0 array