To get the truth table shown, from the following logic circuit, the Gate G should be array |c|c|c| A & B & Y 0 & 0 & 0 0 & 1 & 0 1 & 0 & 1 1 & 1 & 1 array

Step-by-step solution

Truth table for Y , with the possible values of C is, array |c|c|c| A & C & Y 0 & 0 & 0 0 & 0 & 0 1 & 0,1 & 1 1 & 0,1 & 1 array For gate G array |c|c|c|c| & A & B & C (I) & 0 & 0 & 0 (II) & 0 & 1 & 0 (III) & 1 & 0 & 0,1 (IV) & 1 & 1 & 0,1 array G is not a NOT gate as NOT gate takes only one input. (II) indicates G is not a OR gate as OR gate would give high output for the inputs in (II). Also, (II) indicates it is not a XOR gate as XOR would also give high output for inputs in (II). Hence, the given truth table is