In the following combination of logic gates, the outputs (y,z) are...

For Circuit I:
The inputs are $1$ and $1$.
The second input passes through a NOT gate, so it becomes $\overline{1} = 0$.
These signals (1$and 0$) are fed into a NAND gate.
The output $Y = \overline{1 \cdot 0} = \overline{0} = 1$.

For Circuit II:
The inputs to the OR gate are $0$ and $1$.
The output of the OR gate is $0 + 1 = 1$.
This output (1$) and the third input (0$) are fed into an AND gate.
The output $Z = 1 \cdot 0 = 0$.

Therefore, the outputs $(Y, Z)$ are $(1,0)$.

Answer: $1, 0$