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MHT CET 202621 AprilEvening Shift
Exam
MHT CET
Year
2026
Date
21 April
Shift
Evening Shift
Subject
Physics
Chapter
Semiconductors

MHT CET 2026 · 21 April · Evening Shift · Physics · Semiconductors

A combination of logic gates is as shown in the figure. P, Q, R and...

A combination of logic gates is as shown in the figure. P, Q, R and S are the inputs and X, Y and Z are outputs. When inputs P and R are "low" and Q and S are "high", the outputs X, Y and Z respectively are
A combination of logic gates is as shown in the figure. P, Q, R and S are the inputs and X, Y and Z are outputs. When

Options

  1. A1,0,01, 0, 0
  2. B1,1,11, 1, 1
  3. C0,1,00, 1, 0
  4. D0,1,10, 1, 1

Correct answer

D. 0,1,10, 1, 1

Step-by-step solution

From the given logic circuit, the Boolean expressions for the outputs are:
X=P⋅QˉX = P \cdot \bar{Q}
Y=R⋅S‾Y = \overline{R \cdot S}
Z=X+YZ = X + Y

Given the inputs: P=0P = 0 (low), Q=1Q = 1 (high), R=0R = 0 (low), and S=1S = 1 (high).

Substituting these values:
X=0⋅1ˉ=0⋅0=0X = 0 \cdot \bar{1} = 0 \cdot 0 = 0
Y=0⋅1‾=0ˉ=1Y = \overline{0 \cdot 1} = \bar{0} = 1
Z=0+1=1Z = 0 + 1 = 1

Thus, the outputs X,YX, Y, and ZZ are 0,10, 1, and 11 respectively.

Answer: 0,1,10, 1, 1
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