MHT CET 202621 AprilEvening Shift
- Exam
- MHT CET
- Year
- 2026
- Date
- 21 April
- Shift
- Evening Shift
- Subject
- Physics
- Chapter
- Semiconductors
MHT CET 2026 · 21 April · Evening Shift · Physics · Semiconductors
A combination of logic gates is as shown in the figure. P, Q, R and...
A combination of logic gates is as shown in the figure. P, Q, R and S are the inputs and X, Y and Z are outputs. When inputs P and R are "low" and Q and S are "high", the outputs X, Y and Z respectively are


Options
- A
- B
- C
- D
Correct answer
D.
Step-by-step solution
From the given logic circuit, the Boolean expressions for the outputs are:
Given the inputs: (low), (high), (low), and (high).
Substituting these values:
Thus, the outputs , and are , and respectively.
Answer:
Given the inputs: (low), (high), (low), and (high).
Substituting these values:
Thus, the outputs , and are , and respectively.
Answer: